As small-sized electronic apparatuses such as cellular telephones, portable computers, etc. have become widespread, demand has increased for reduction of the size of semiconductor packages installed in such apparatuses. Semiconductor packages having a BGA or LGA architecture are appropriate for such size reduction since such semiconductor packages can be arranged two-dimensionally at the bottom surface of the device along the external terminals of the device as an interface with the external board. However, in comparison to devices of the conventional QFP (Quad Flat Package), such semiconductor packages are generally deficient in that per unit manufacturing cost is high.
Thermoplastic insulation film comprising polyimide resin or other resins is used for manufacture of a BGA or LGA architecture semiconductor package. Multiple identical circuit patterns are formed along the length-wise and transverse directions of this insulation film. A semiconductor chip is mounted upon each circuit pattern, and a mold is used for sealing to produce multiple semiconductor packages simultaneously in a row.
FIG. 10 shows one example of a thermoplastic film used for production of this type of semiconductor package. An insulation film 110 has a row of sprocket holes 112 along both edges of the insulation film, thereby making possible winding and movement thereof. Between both rows of the above mentioned sprocket holes of the insulation film, multiple circuit patterns 114 are formed comprising copper or some other metal (in this figure, the actual circuit pattern is omitted, and only the region thereof is indicated.). Beneath the region of this circuit pattern 114, multiple through holes are formed prior to formation of this circuit (not shown in the figure). Furthermore, upon the upper surface of insulation film 110, together with the above mentioned circuit pattern 114 are formed conductor pattern 116 and bridge 118 connecting together the conductor pattern and each circuit pattern 114. Conductor pattern 116 and bridge 118 are electricity-supply patterns for performance of plating of each circuit pattern 114. A cathode of a direct current power supply is connected to the above mentioned conductor pattern, and direct current electrolysis is carried out in a solution containing plating metal ions. Therefore patterned plating occurs upon the insulation film containing the circuit patterns. Platting of each circuit pattern is a technique required for improvement of corrosion resistance and solder leakage resistance of the circuit pattern. Formation of circuit pattern 114 upon that above mentioned insulation film 110, electrical-supply conductor pattern 116, and bridge 118 is accomplished by first pasting metal foil over the entire region of the insulation film, followed by use of lithographic technology to remove unnecessary parts, i.e. the interior region of the circuit pattern and the perimeter region of each circuit pattern.
The production of a conventional semiconductor package using the above mentioned insulation film, as shown in FIG. 10, includes the steps of mounting of a semiconductor chip upon each circuit pattern 114 of insulation film 110 and connecting the electrode pad of each semiconductor chip with circuit pattern 114 by wire bonding. Thereafter, insulation film 110 is placed in a mold, and each semiconductor chip is molded. Here the mold has a cavity corresponding to each of the semiconductor chips. Molding compound is injected into the interior of each cavity, thereby sealing the semiconductor chip and forming the exterior shape of the semiconductor package by this molding compound. Then after formation of solder pads upon the insulation through holes as exterior contacting terminals at the backside of the insulation film, a punch-out jig is used to punch out each semiconductor package one-after-another from the insulation film.
However, manufacture of a semiconductor package using the above mentioned conventional insulation film has several problems as described below.
(1) When manufacturing semiconductor packages of different sizes, according to size, design is required of a corresponding circuit pattern and an insulation film having corresponding through holes. Therefore, according to the size of the manufactured semiconductor package, placement of through holes in the above mentioned insulation film must be changed, and a mold (referred to hereinafter as a stamper) must be newly prepared for through hole aperturing for each type of package. As a result, problems arise such as prolongation of TAT (turn around time) and increase of manufacturing cost during semiconductor package manufacture using conventional insulation film.
(2) During conventional semiconductor package manufacturing, resin is molded corresponding to each semiconductor package, and a punch-out jig is used for dicing into separate units. Therefore reduction of the spacing between each circuit pattern upon the insulation film is difficult. Therefore a limited number of semiconductor packages can be manufactured from a single piece of insulation film, and many places upon the insulation film are unused as a substrate for the semiconductor package. This results in increased manufacturing cost and prevents improvement of productivity.
Therefore an object of the present invention is to provide an insulation film that can be used universally with good non-specificity, thereby reducing manufacturing cost and turn around time of the semiconductor package.
Moreover, another object of the present invention is to increase the number of semiconductor packages per unit surface area that can be manufactured from insulation film, and reduce the discarded region of the insulation film, thereby lowering manufacturing cost of the semiconductor package.